An accurate analytical spur model for an integer-N phase-locked loop

Abstract

Reference spur is a limiting performance factor in an integer-N phase-locked loop (PLL). In this paper, we investigate the effect of VCO gain, ripple magnitude in VCO tuning voltage and reference frequency with reference spur magnitude. Normally, VCO gain and reference frequency are chosen according to needed system requirement, leaving only the ripple voltage on the VCO control signal to be minimised in order to minimize the reference spur. The ripple voltage is mainly contributed by current mismatch, current leakage, switching delay and discrepancies between the rise and fall times in charge pump circuit. In addition, loop filter is also affecting the ripple voltage. In this paper, we consider these effects analytically to predict ripple voltage in the VCO tuning voltage and hence calculate the reference spur magnitude of the PLL device.