Please use this identifier to cite or link to this item: http://hdl.handle.net/2440/16589
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dc.contributor.authorLee, L.en
dc.contributor.authorAl-Sarawi, S.en
dc.contributor.authorAbbott, D.en
dc.date.issued2005en
dc.identifier.citationSmart Materials & Structures, 2005; 14(4):569-574en
dc.identifier.issn0964-1726en
dc.identifier.issn1361-665Xen
dc.identifier.urihttp://hdl.handle.net/2440/16589-
dc.description© 2005 IOP Publishingen
dc.description.abstractIn this paper we demonstrate the operation of a dynamic serial-to-parallel shift register, with only four transistors per stage. A bootstrap capacitor is used to overcome the problem of transistor threshold voltage drop. We will refer to this new logic family as non-ratioed bootstrap logic (NRBL). Simulation results are presented showing the operation of the shift register along with Monte Carlo analysis to demonstrate the robustness of the circuit. A key application area for this novel shift register is in the addressing and read out of high-density smart sensor arrays.en
dc.description.statementofresponsibilityLeo Lee, Said Al-Sarawi and Derek Abbotten
dc.language.isoenen
dc.publisherIOP Publishing Ltden
dc.source.urihttp://www.iop.org/EJ/abstract/0964-1726/14/4/015/en
dc.titleDynamic bootstrapped shift register for smart sensor arraysen
dc.typeJournal articleen
dc.identifier.rmid0020050913en
dc.identifier.doi10.1088/0964-1726/14/4/015en
dc.identifier.pubid54724-
pubs.library.collectionElectrical and Electronic Engineering publicationsen
pubs.verification-statusVerifieden
pubs.publication-statusPublisheden
Appears in Collections:Electrical and Electronic Engineering publications

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