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|Title:||Design of a very high speed dynamic RAM in gallium arsenide for an ATM switch / Michael K. McGeever.|
|Author:||McGeever, Michael K.|
|School/Discipline:||Dept. of Electrical and Electronic Engineering|
|Abstract:||This thesis analyses the design of a Dynamic RAM in gallium arsenide for use as a buffer in an ATM switch. The causes of leakage are investigated and methods to overcome or compensate the leakage are devised, resulting in a memory cell with a large storage time, high speed and low power dissipation. A 14 kbit RAM array is designed and laid out in gallium arsenide. The RAM array is designed to operate over a -25oC to +125oC temperature range using process parameters which vary by up to 2 [sigma] from typical.|
|Dissertation Note:||Thesis (M.Eng.Sc.)--University of Adelaide, Dept. of Electrical & Electronic Engineering, 1996?|
|Subject:||Random access memory.|
Semiconductor storage devices Design and construction.
Gallium arsenide semiconductors.
Asynchronous transfer mode.
|Description:||Bibliography: leaves 156-165.|
xvi, 174 leaves : ill. ; 30 cm.
|Provenance:||This electronic version is made publicly available by the University of Adelaide in accordance with its open access policy for student theses. Copyright in this thesis remains with the author. This thesis may incorporate third party material which has been used by the author pursuant to Fair Dealing exception. If you are the author of this thesis and do not wish it to be made publicly available or If you are the owner of any included third party copyright material you wish to be removed from this electronic version, please complete the take down form located at: http://www.adelaide.edu.au/legals|
|Appears in Collections:||Research Theses|
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|02whole.pdf||9.31 MB||Adobe PDF||View/Open|
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