Please use this identifier to cite or link to this item: http://hdl.handle.net/2440/28420
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dc.contributor.authorAl-Sarawi, S.en
dc.date.issued2003en
dc.identifier.citationVLSI circuits and systems / José Fco. López, Juan A. Montiel-Nelson, Dimitris Pavlidis (eds.), pp. 65-76en
dc.identifier.isbn0819449776en
dc.identifier.issn0277-786Xen
dc.identifier.urihttp://hdl.handle.net/2440/28420-
dc.description.abstractOperational amplifiers have an important role as a basic building block in analog circuit design. One of the performance limitations of these circuits is the input referred offset voltage or simply input offset voltage. This voltage can range between 1 - 30 mV depending on the fabrication process and the sizes of the ideally symmetrical input transistors of the differential amplifier. Two new techniques to digitally trim the offset voltage of operation amplifier are presented and discussed. The techniques can be divided into two categories. The first is called weighted current technique, while the second is called weighted voltage technique. The attractive features of the new techniques are the trimming is performed digitally, large dynamic range; require small silicon area, and the ability to provide auto-zero cancellation using extra hardware. In the presented analysis, a binary weighted scheme will be used. However, the techniques are not restricted to that scheme and they are still applicable with other weighting schemes. A detailed analysis of these techniques will be presented and discussed and measurement from fabrication and simulation will be presented.en
dc.language.isoenen
dc.publisherSPIEen
dc.relation.ispartofseriesProceedings of SPIE--the International Society for Optical Engineering ; 5117.en
dc.rights©2003 COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.en
dc.titleNew efficient offset voltage cancellation techniques using digital trimmingen
dc.typeConference paperen
dc.identifier.rmid0020032138en
dc.contributor.conferenceVLSI Circuits and Systems Conference (2003 : Gran Canaria, Spain)en
dc.identifier.doi10.1117/12.498597en
dc.publisher.placeUSAen
dc.identifier.pubid57685-
pubs.library.collectionElectrical and Electronic Engineering publicationsen
pubs.verification-statusVerifieden
pubs.publication-statusPublisheden
dc.identifier.orcidAl-Sarawi, S. [0000-0002-3242-8197]en
Appears in Collections:Electrical and Electronic Engineering publications

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