Please use this identifier to cite or link to this item: http://hdl.handle.net/2440/30010
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dc.contributor.authorKelly, D.en
dc.contributor.authorPhillips, B.en
dc.date.issued2005en
dc.identifier.citationAdvances in Computer Systems Architecture, 2005 / Srikanthan, T., Xue, J., Chang, C. (ed./s), pp.353-366en
dc.identifier.isbn3540296433en
dc.identifier.isbn9783540296430en
dc.identifier.urihttp://hdl.handle.net/2440/30010-
dc.descriptionThe original publication can be found at www.springerlink.comen
dc.description.abstractValue speculation is currently widely used in processor designs to increase the overall number of instructions executed per cycle (IPC). Current methods use sophisticated prediction techniques to speculate on the outcome of branches and execute code accordingly. Speculation can be extended to the approximation of arithmetic values. As arithmetic operations are slow to complete in pipelined execution an increase in overall IPC is possible through accurate arithmetic data value speculation. This paper will focus on integer adder units for the purposes of demonstrating arithmetic data value speculation.en
dc.language.isoenen
dc.publisherSpringeren
dc.relation.ispartofseriesLecture notes in computer science ; 3740en
dc.source.urihttp://www.springerlink.com/content/p555p48w653g6r48/?p=a722cf97e38c41cf938e5a9142956700&pi=27en
dc.titleArithmetic data value speculationen
dc.typeBook chapteren
dc.identifier.rmid0020052560en
dc.identifier.doi10.1007/11572961_28en
dc.publisher.placeBerlin, Heidelbergen
dc.identifier.pubid53548-
pubs.library.collectionElectrical and Electronic Engineering publicationsen
pubs.verification-statusVerifieden
pubs.publication-statusPublisheden
dc.identifier.orcidPhillips, B. [0000-0001-8288-4791]en
Appears in Collections:Electrical and Electronic Engineering publications

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