Please use this identifier to cite or link to this item:
https://hdl.handle.net/2440/30010
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DC Field | Value | Language |
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dc.contributor.author | Kelly, D. | - |
dc.contributor.author | Phillips, B. | - |
dc.contributor.editor | Srikanthan, T. | - |
dc.contributor.editor | Xue, J. | - |
dc.contributor.editor | Chang, C. | - |
dc.date.issued | 2005 | - |
dc.identifier.citation | Advances in Computer Systems Architecture, 2005 / Srikanthan, T., Xue, J., Chang, C. (ed./s), vol.3740 LNCS, pp.353-366 | - |
dc.identifier.isbn | 3540296433 | - |
dc.identifier.isbn | 9783540296430 | - |
dc.identifier.uri | http://hdl.handle.net/2440/30010 | - |
dc.description | The original publication can be found at www.springerlink.com | - |
dc.description.abstract | Value speculation is currently widely used in processor designs to increase the overall number of instructions executed per cycle (IPC). Current methods use sophisticated prediction techniques to speculate on the outcome of branches and execute code accordingly. Speculation can be extended to the approximation of arithmetic values. As arithmetic operations are slow to complete in pipelined execution an increase in overall IPC is possible through accurate arithmetic data value speculation. This paper will focus on integer adder units for the purposes of demonstrating arithmetic data value speculation. | - |
dc.language.iso | en | - |
dc.publisher | Springer | - |
dc.relation.ispartofseries | Lecture notes in computer science ; 3740 | - |
dc.source.uri | http://www.springerlink.com/content/p555p48w653g6r48/?p=a722cf97e38c41cf938e5a9142956700&pi=27 | - |
dc.title | Arithmetic data value speculation | - |
dc.type | Book chapter | - |
dc.identifier.doi | 10.1007/11572961_28 | - |
dc.publisher.place | Berlin, Heidelberg | - |
pubs.publication-status | Published | - |
dc.identifier.orcid | Phillips, B. [0000-0001-8288-4791] | - |
Appears in Collections: | Aurora harvest 2 Electrical and Electronic Engineering publications |
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