Please use this identifier to cite or link to this item: https://hdl.handle.net/2440/30010
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Type: Book chapter
Title: Arithmetic data value speculation
Author: Kelly, D.
Phillips, B.
Citation: Advances in Computer Systems Architecture, 2005 / Srikanthan, T., Xue, J., Chang, C. (ed./s), vol.3740 LNCS, pp.353-366
Publisher: Springer
Publisher Place: Berlin, Heidelberg
Issue Date: 2005
Series/Report no.: Lecture notes in computer science ; 3740
ISBN: 3540296433
9783540296430
Editor: Srikanthan, T.
Xue, J.
Chang, C.
Abstract: Value speculation is currently widely used in processor designs to increase the overall number of instructions executed per cycle (IPC). Current methods use sophisticated prediction techniques to speculate on the outcome of branches and execute code accordingly. Speculation can be extended to the approximation of arithmetic values. As arithmetic operations are slow to complete in pipelined execution an increase in overall IPC is possible through accurate arithmetic data value speculation. This paper will focus on integer adder units for the purposes of demonstrating arithmetic data value speculation.
Description: The original publication can be found at www.springerlink.com
DOI: 10.1007/11572961_28
Published version: http://www.springerlink.com/content/p555p48w653g6r48/?p=a722cf97e38c41cf938e5a9142956700&pi=27
Appears in Collections:Aurora harvest 2
Electrical and Electronic Engineering publications

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