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|Title:||FPGA implementation of a single channel GPS interference mitigation algorithm|
|Citation:||Journal of Global Positioning Systems, 2004; 3(1-2):106-114|
|Publisher:||International Association for Chinese Professionals in Global Positioning Systems|
|Gabriel Bucco, Matthew Trinkle, Doug Gray and Wai-Ching Cheuk|
|Abstract:||The FPGA (Field-Programmable Gate Array) implementation of an adaptive filter for narrow band interference excision in Global Positioning Systems is described. The algorithm implemented is a delayed LMS (Least Mean Squares) adaptive algorithm improved by incorporating a leakage factor, rounding and constant resetting of the filter weights. This was necessary as the original adaptive algorithm had stability problems : the filter weights did not remain fixed, and tended to drift until they overflowed, causing the filter response to degrade. Each model was first tested in Simulink, implemented in VHDL (Verilog Hardware Description Language) and then downloaded to an FPGA board for final testing. Experimental measurements of anti-jam margins were obtained.|
|Keywords:||Adaptive filtering, FPGA, LMS, GPS,Interference mitigation|
|Rights:||© 2004 CPGPS|
|Appears in Collections:||Electrical and Electronic Engineering publications|
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