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Type: Conference paper
Title: An RNS-enhanced microprocessor implementation of public key cryptography
Author: Lim, Z.
Phillips, B.
Citation: ACSSC 2007: Conference Record of the Forty-First Asilomar Conference on Signals, Systems and Computers:pp.1430-1434
Publisher: IEEE
Publisher Place: CDROM
Issue Date: 2007
ISBN: 9781424421107
ISSN: 1058-6393
Conference Name: Asilomar Conference on Signals, Systems & Computers (41st : 2007 : Pacific Grove, California)
Editor: Matthews, M.B.
Abstract: This paper presents a new residue number system implementation of the RSA cryptosystem. The system runs on a low-area, low-power microprocessor that we have extended with hardware support for residue arithmetic. When compared against a baseline implementation that uses non-RNS multi-precision methods, the new RNS implementation executes in 67.7% fewer clock cycles. The hardware support requires 42.7% more gates than the base processor core. © 2007 IEEE.
DOI: 10.1109/ACSSC.2007.4487465
Appears in Collections:Aurora harvest 6
Electrical and Electronic Engineering publications

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