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|Web of Science®
|Using transfer-resource graph for software-based verification of system-on-chip
|IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems, 2008; 27(7):1315-1328
|IEEE-Inst Electrical Electronics Engineers Inc
|Xiaoxi Xu and Cheng-Chew Lim
|The verification of system-on-chip is challenging due to its high level of integration. Multiple components in a system can behave concurrently and compete for resources. Hence, for simulation-based verification, we need a methodology that allows one to automatically generate test cases for testing concurrent and resource-competing behaviors.We introduce the use of a transferresource graph (TRG) as the model for test generation. From a high abstraction level, TRG is able to model the parallelism between heterogeneous interaction forms in a system. We show how TRG is used in generating test cases of resource competitions and how these test cases are structured in event-driven test programs. For coverage, TRG can be converted to a Petri net, allowing one to measure the completeness of concurrency in simulation.
|Copyright © 2006 IEEE
|Appears in Collections:
|Aurora harvest 6
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