Please use this identifier to cite or link to this item:
|Scopus||Web of Science®||Altmetric|
|Title:||Accurate reference spur estimation using behavioural modelling|
|Citation:||Proceedings of the Third International Conference on Intelligent Systems Modelling and Simulation, held in Kota Kinabalu, Malaysia, 8-10 February, 2012 / D. Al-Dabass, I. Saad, Mohd Harun Abdullah, J. Yunus and Z. Ibrahim (eds.): pp.705-710|
|Conference Name:||International Conference on Intelligent Systems Modelling and Simulation (3rd : 2012 : Kota Kinabalu, Malaysia)|
|Noorfazila Kamal, Said Al-Sarawi and Derek Abbott|
|Abstract:||Reference spur is a periodic noise that can be observed at the output of an integer-N phase-locked loop (PLL). This noise is dominated by circuit non-idealities in phase/frequency detector (PFD) and charge pump. The spur magnitude is linearly related with Voltage Controlled Oscillator (VCO) gain. Estimating this noise using transistor level simulation is time consuming. Therefore, in this paper we present a Simulink behavioural model to accurately estimate the reference spur. PFD delay, charge pump current mismatch, rise and fall times effect and switching delay, in addition to non-linearity in the VCO gain, are all included in this model. The proposed model was used to estimate the reference spur for an 18.5 GHz PLL and the results were compared with transistor level simulation, and show less than 3% difference in the result.|
|Keywords:||Reference spur estimation; PLL modelling; veryhigh frequency PLL; charge pump modelling; phase/frequency detector modelling|
|Rights:||© 2012 IEEE|
|Appears in Collections:||Electrical and Electronic Engineering publications|
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.