Review of beamforming algorithms for stationary signals
Date
2018
Authors
Mulinde, R.
Ho, S.W.
Chan, T.
Dissanayake, D.W.
Attygalle, M.
Aziz, S.M.
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Report
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Abstract
This report presents the results from research; phase 1 of a collaborative re-search, development and implementation project conducted by the University ofSouth Australia (UniSA) in conjunction with the Defence Science and Technology Group (DSTG), Electronic Warfare (EW) division, regarding suitable real-time implementation of wideband beamforming techniques. Adaptive wideband beamforming algorithms are investigated to select those suitable for implementation using state-of-the-art parallel processing with field programmable gate arrays (FPGAs) or graphics processing units (GPUs).This phase involved three stages namely:1. Literature review on existing techniques: Several beamforming algorithms have been examined to determine their suitability for adaptive wideband beamforming. Subsequently, some of these techniques have been selected for benchmarking.2. Comparison of techniques and benchmarking: Several characteristics of the select techniques have been selected based on their suitability. A detailed comparison of results in literature and preliminary simulations on some of the most appealing schemes have been performed.3. Highlight of suitable techniques: Based on the requirements from DSTG,schemes for parameter estimation are presented. Parameter estimation involves estimating the unknown parameters of the signal of interest (SOI) such as the direction of arrival (DOA). Beamforming is one of the techniques that can be used for parameter estimation.Adaptive digital beamforming: This phase utilises the parameters from the parameter estimation phase to detect and suppress undesired signals (clutterand jammer interference).In this report, adaptive wideband beamforming algorithms are investigated and the ones most promising to deliver real-time performance are identified for modelling and analysis. In selecting the algorithms for modelling, considerations are given to the algorithms likely to be most suited to parallel hardware implementation.
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Data source: Dataset, Access restricted to approved only personnel approved by DSTG and UniSA