Low depth, low power carry lookahead adders using threshold logic

Celinski, P.Lopez, J.Al-Sarawi, S.Abbott, D.2006-06-192006-06-192002Microelectronics Journal, 2002; 33(12):1071-10770026-26921879-2391http://hdl.handle.net/2440/2446This paper describes a low power threshold logic-gate based on a capacitive input, charge recycling differential sense amplifier latch. The gate is shown to have low power dissipation and high operating speed, as well as robustness under process, temperature and supply voltage variations. This is followed by the main result, which is the development of a novel, low depth, carry lookahead addition scheme based on threshold logic. One such adder is also designed and simulated using the proposed gate.enLow depth, low power carry lookahead adders using threshold logicJournal article002002117010.1016/S0026-2692(02)00112-X0001798402000062-s2.0-003689643659938Al-Sarawi, S. [0000-0002-3242-8197]Abbott, D. [0000-0002-0945-2674]