A neuromorphic VLSI design for spike timing and rate based synaptic plasticity

Simple item page
dc.contributor.authorAzghadi, M.
dc.contributor.authorAl-Sarawi, S.
dc.contributor.authorAbbott, D.
dc.contributor.authorIannella, N.
dc.date.issued2013
dc.description.abstractAbstract not available
dc.description.statementofresponsibilityMostafa Rahimi Azghadi, Said Al-Sarawi, Derek Abbott, Nicolangelo Iannella
dc.identifier.citationNeural Networks, 2013; 45:70-82
dc.identifier.doi10.1016/j.neunet.2013.03.003
dc.identifier.issn0893-6080
dc.identifier.issn1879-2782
dc.identifier.orcidAl-Sarawi, S. [0000-0002-3242-8197]
dc.identifier.orcidAbbott, D. [0000-0002-0945-2674]
dc.identifier.urihttp://hdl.handle.net/2440/79999
dc.language.isoen
dc.publisherPergamon-Elsevier
dc.rights© 2013 Elsevier Ltd. All rights reserved.
dc.source.urihttps://doi.org/10.1016/j.neunet.2013.03.003
dc.subjectSynaptic plasticity; neuromorphic VLSI; spike timing dependent plasticity; rate based plasticity; BCM
dc.titleA neuromorphic VLSI design for spike timing and rate based synaptic plasticity
dc.typeJournal article
pubs.publication-statusPublished

Files

Original bundle
Now showing 1 - 1 of 1
No Thumbnail Available
Name:
hdl_79999.pdf
Size:
923.29 KB
Format:
Adobe Portable Document Format
Description:
Accepted version
Download

Collections

Electrical and Electronic Engineering publications