Optimizing system-on-chip verifications with multi-objective genetic evolutionary algorithms

dc.contributor.author	Cheng, A.
dc.contributor.author	Lim, C.
dc.date.issued	2014
dc.description.abstract	Verification of semiconductor chip designs is commonly driven by single goal orientated measures. With increasing design complexities, this approach is no longer effective. We enhance the effectiveness of coverage driven design verifications by applying multi-objective optimization techniques. The technique is based on genetic evolutionary algorithms. Difficulties with conflicting test objectives and selection of tests to achieve multiple verification goals in the genetic evolutionary framework are also addressed.
dc.description.statementofresponsibility	Adriel Cheng and Cheng-Chew Lim
dc.identifier.citation	Journal of Industrial and Management Optimization, 2014; 10(2):383-396
dc.identifier.doi	10.3934/jimo.2014.10.383
dc.identifier.issn	1547-5816
dc.identifier.issn	1553-166X
dc.identifier.orcid	Lim, C. [0000-0002-2463-9760]
dc.identifier.uri	http://hdl.handle.net/2440/81923
dc.language.iso	en
dc.publisher	American Institute of Mathematical Sciences
dc.rights	Copyright status unknown
dc.source.uri	https://doi.org/10.3934/jimo.2014.10.383
dc.subject	Multi-objective optimization
dc.subject	genetic evolutionary algorithms
dc.subject	Pareto optimization
dc.subject	system-on-chip verification
dc.subject	coverage driven verification.
dc.title	Optimizing system-on-chip verifications with multi-objective genetic evolutionary algorithms
dc.type	Journal article
pubs.publication-status	Published

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