Unbiased finite-memory digital phase-locked loop
Date
2016
Authors
You, S.
Pak, J.
Ahn, C.
Shi, P.
Lim, M.
Editors
Advisors
Journal Title
Journal ISSN
Volume Title
Type:
Journal article
Citation
IEEE Transactions on Circuits and Systems - II - Express Briefs, 2016; 63(8):798-802
Statement of Responsibility
Sung Hyun You, Jung Min Pak, Choon Ki Ahn, Peng Shi, and Myo Taeg Lim
Conference Name
Abstract
Digital phase-locked loops (DPLLs) have been commonly used to estimate phase information. However, they exhibit poor performance or, occasionally, a divergence phenomenon, if noise information is incorrect or if there are quantization effects. To overcome the weaknesses of existing DPLLs, we propose a new DPLL with a finite-memory structure called the unbiased finite-memory DPLL (UFMDPLL). The UFMDPLL is independent of noise covariance information, and it shows intrinsic robustness properties against incorrect noise information and quantization effects due to the finite-memory structure. Through numerical simulations, we show that the proposed DPLL is more robust against incorrect noise information and quantization effects than the conventional DPLLs are.
School/Discipline
Dissertation Note
Provenance
Description
Date of publication February 18, 2016; date of current version July 28, 2016
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Rights
© 2016 IEEE.