Analysis of network-on-chip topologies for cost-efficient chip multiprocessors

Files

hdl_97927.pdf (567.85 KB)
  (Accepted Version)

Date

2016

Authors

Ortín-Obón, M.
Suárez-Gracia, D.
Villarroya-Gaudó, M.
Izu, C.
Viñals-Yúfera, V.

Editors

Advisors

Journal Title

Journal ISSN

Volume Title

Type:

Journal article

Citation

Microprocessors and Microsystems, 2016; 42:24-36

Statement of Responsibility

Marta Ortín-Obón, Darío Suárez-Gracia, María Villarroya-Gaudó, Cruz Izu, Víctor Viñals-Yúfera

Conference Name

Abstract

Abstract not available

School/Discipline

Dissertation Note

Provenance

Description

Access Status

Rights

© 2016 Elsevier B.V. All rights reserved.

License

Grant ID

Call number

Persistent link to this record